ISSN: 2349-5162

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Published in:

Volume 3 Issue 7
July-2016
eISSN: 2349-5162

Unique Identifier

JETIR1607028

Page Number

134-140

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Title

A reliable technique of fault tolerance through configuration frames

ISSN

2349-5162

Cite This Article

"A reliable technique of fault tolerance through configuration frames", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.3, Issue 7, page no.134-140, July-2016, Available :http://www.jetir.org/papers/JETIR1607028.pdf

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Abstract

Fault tolerance is the system’s ability to perform its specified operation in the presence of faults to increase its reliability. In the project, PDR based technique is used to tolerate stuck at faults in configurable logic blocks. Configuration frames are reconfigured by shifting the configuration bits such that the faulty SRAM cells are replaced by the spare SRAM cells to tolerate the faults. Since pre-allocated CLBs are not required, this technique has very less area overhead. Modelsim is used to simulate the design.

Key Words

Configuration frames, SRAM based FPGA, fault tolerance, Simulation.

Cite This Article

"A reliable technique of fault tolerance through configuration frames", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.3, Issue 7, page no. pp134-140, July-2016, Available at : http://www.jetir.org/papers/JETIR1607028.pdf

Publication Details

Published Paper ID: JETIR1607028
Registration ID: 160339
Published In: Volume 3 | Issue 7 | Year July-2016
DOI (Digital Object Identifier):
Page No: 134-140
ISSN Number: 2349-5162

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Cite This Article

"A reliable technique of fault tolerance through configuration frames", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.3, Issue 7, page no. pp134-140, July-2016, Available at : http://www.jetir.org/papers/JETIR1607028.pdf




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