• Ravi Ranjan
• Dr. Neetesh Raghuwanshi
• Prof. Dr. Bharti Chourasia

Power crisis is a vital problem in today’s world. In recent years, the growing market of electronic systems suffers from power dissipation and delay removal problem. Bennett et al. proved that the one-to-one mapping between the inputs and outputs of reversible circuit drastically reduces the power consumption and delay consumed of a circuit. There are four major design parameters of reversible circuits. First is the gate count which is the number of gate are used in the circuit. Second is the quantum delay. Third is the number of ancilla inputs which are constant inputs which are used to maintain the reversibility of the device. Fourth is the number of garbage outputs i.e. output signals which are not used as inputs to other gates and are only there to maintain reversibility. In this paper the survey of design central processing unit based on reversible gate and parameter.

Reversible Gates, Arithmetic Logic Unit (ALU), Garbage Output, Quantum Cost

"Survey Paper on Reversible Arithmetic Unit Based on Programmable Gate Structure", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 7, page no.2007-2011, July-2020, Available :http://www.jetir.org/papers/JETIR2007254.pdf

"Survey Paper on Reversible Arithmetic Unit Based on Programmable Gate Structure", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 7, page no. pp2007-2011, July-2020, Available at : http://www.jetir.org/papers/JETIR2007254.pdf