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"A Verilog Implementation and Performance Analysis of Polar Encoder and Decoder for Next Generation Communication Application", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.8, Issue 2, page no.1751-1756, February-2021, Available :http://www.jetir.org/papers/JETIR2102212.pdf

• Rahul Parmar
• Dr. Anshuj Jain

Polar codes investigated and achieve improved performance in 5G communication scenario in research laboratories. Especially, the original design of the polar codes achieves capacity when block sizes are asymptotically large with successive cancellation decoder. Polar codes become a new channel coding, which will be common to apply for 5th generation wireless communication systems. There are many aspects that polar codes should investigate further before considering for industry applications. The original design of the polar codes achieves capacity when block sizes are asymptotically large with successive cancellation decoder. So there is a need of high speed, less area and low power encoding scheme for next generation communication. In this paper, design and performance analysis of polar encoder and decoder are presented. Xilinx ISE 14.7 software is used to implement and simulate the polar encoder and decoder. The Simulation results show that the proposed polar code can achieve higher performance.

"A Verilog Implementation and Performance Analysis of Polar Encoder and Decoder for Next Generation Communication Application", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.8, Issue 2, page no. pp1751-1756, February-2021, Available at : http://www.jetir.org/papers/JETIR2102212.pdf