UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 8 Issue 3
March-2021
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2103217


Registration ID:
306617

Page Number

1776-1781

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Title

An Implementation and Performance Enhancement of Built In Self Test with Linear Feedback Shift Register for Advance Digital Processing

Abstract

Built-in Self Test is the technique of designing additional hardware and software features into integrated circuits to allow them to perform self-testing. A linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. Field programmable gate array (FPGA) has become widely accepted design approach for low- and medium-range application because of functional flexibility and low development cost. The role of testing is to detect whether something went wrong and the role of diagnosis is to determine exactly what went wrong. This paper proposes an implementation of built in self test using verilog coding on xilnx 14.7 software. In this work, also implement Linear Feedback Shift Register and SRAM controller to support BIST for performance improvement.

Key Words

BIST, LFSR, SRAM, Controller, Latency, Area, High Speed, Low Power

Cite This Article

"An Implementation and Performance Enhancement of Built In Self Test with Linear Feedback Shift Register for Advance Digital Processing", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.8, Issue 3, page no.1776-1781, March-2021, Available :http://www.jetir.org/papers/JETIR2103217.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"An Implementation and Performance Enhancement of Built In Self Test with Linear Feedback Shift Register for Advance Digital Processing", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.8, Issue 3, page no. pp1776-1781, March-2021, Available at : http://www.jetir.org/papers/JETIR2103217.pdf

Publication Details

Published Paper ID: JETIR2103217
Registration ID: 306617
Published In: Volume 8 | Issue 3 | Year March-2021
DOI (Digital Object Identifier):
Page No: 1776-1781
Country: bhopal, MP, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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