• G.INDRA REDDY

Embedded systems with predetermined applications can attain further up gradation by the addition of fast and energy efficient scratchpad memory (SPM) on chip and moving frequent accesses code and/or data from main memory to SPM. Many microprocessors spends majority of its time waiting for the data to arrive from slow memory devices connected to it. This is termed as memory wall problem. The main aim of this paper is to reduce memory wall problem by increasing the speed of the system not only by processor speed but also by the memory speed. Also this paper proposes a two-stage method which works on improving the efficiency of the memory by focusing on both on chip and off chip memory, thereby reducing the memory wall problem. Experimental results reveal 1) allocating a dedicated portion of the on-chip processor memory as SPM 2) studying the combined benefit of cache and SPM for both single and multiple processor 3) Using external cache alone with on chip SPM and cache which can further minimize the energy consumption of the embedded systems. Simulation result for our method reduces the energy consumption of the system by 3%.Energy gain can be obtained by using a external cache alone with on chip cache and SPM.

Memory Wall Problem, Embedded System,Cache, Scratch Pad Memory

" An optimization technique to improve power consumption of Embedded System", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 10, page no.114-119, October-2018, Available :http://www.jetir.org/papers/JETIRJ006018.pdf

" An optimization technique to improve power consumption of Embedded System", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 10, page no. pp114-119, October-2018, Available at : http://www.jetir.org/papers/JETIRJ006018.pdf