UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 5 Issue 10
October-2018
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIRJ006032


Registration ID:
189385

Page Number

197-202

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Title

Procedure for verification and testing of critical functionalities for an IP core under reset condition

Abstract

Involvement for an intellectual property (IP) core assessment demonstrates diverse methodologies that can be implement for utilization of IP- core in CEH (Complex Electronic Hardware) and these should reflect to design level at which IP is conveyed (soft, firm, hard) and basically reminds on the availability to the design data. Using an IP-core or utilizing inside the airborne electronic hardware, the IP user ought to pick the most suitable approaches to assuring that the IP will satisfy the design affirmation goals. This paper gives data on the methodologies that can be utilized, or the testing of IP core as per DO-254 measurements and these measurements how to verify in to possible condition like reset scenario to verify critical module or functionalities under hardware requirements. The main objective of this paper is the Target level testing of IP CORE, it will be analyzed by capturing and verifying the data, whether transmitted data contains proper values by the use of analyzer tool. The efficacy of the data is demonstrated with graphic controller as a case study

Key Words

FPGA, IP core, Chip Scope Pro analyzer Tool, Test Cases, FIFO, VHDL.

Cite This Article

"Procedure for verification and testing of critical functionalities for an IP core under reset condition", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 10, page no.197-202, October-2018, Available :http://www.jetir.org/papers/JETIRJ006032.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Procedure for verification and testing of critical functionalities for an IP core under reset condition", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 10, page no. pp197-202, October-2018, Available at : http://www.jetir.org/papers/JETIRJ006032.pdf

Publication Details

Published Paper ID: JETIRJ006032
Registration ID: 189385
Published In: Volume 5 | Issue 10 | Year October-2018
DOI (Digital Object Identifier):
Page No: 197-202
Country: RANGA REDDY, HYDERABAD, TELANGANA, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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