UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 4 Issue 12
December-2017
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR1712103


Registration ID:
171144

Page Number

564-567

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Title

Design of FPGA based Cyber Secured Encoder for IoT

Abstract

Abstract: In today’s scenario of cyber security, deciding secured design is a vital task. Standard design techniques used for securing embedded systems are not suitable for CPS due to the restricted computation and communication budget available. The sensitivity of sensed data and the presence of actuation components further increase the security requirements of CPS. To address these issues, it is necessary to provide new design method in which security is considered from the beginning of the whole design flow and addressed in a holistic way. We focus on the design of secure CPS as part of the complete CPS design process, and provide insights into new requirements on platform-aware design. With the planned implementation of IoT components with in an enterprise we can provide better cyber security. We are going to use a new design approach in IP based cyber secured design of FPGA based encoder with the help of a suite of protocols. The objective of this design is to improve the level of security to the system with the secured design of encoder.

Key Words

Keywords: FPGA (Field Programmable Gate Array), Encoder, Cyber Security, Cyber Physical Systems (CPS), Internet of Things (IoT), IP (Internet Protocol).

Cite This Article

"Design of FPGA based Cyber Secured Encoder for IoT", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.4, Issue 12, page no.564-567, December-2017, Available :http://www.jetir.org/papers/JETIR1712103.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Design of FPGA based Cyber Secured Encoder for IoT", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.4, Issue 12, page no. pp564-567, December-2017, Available at : http://www.jetir.org/papers/JETIR1712103.pdf

Publication Details

Published Paper ID: JETIR1712103
Registration ID: 171144
Published In: Volume 4 | Issue 12 | Year December-2017
DOI (Digital Object Identifier):
Page No: 564-567
Country: Hyderabad, Telangana, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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