• Shruthi BS
• Dr. H. Umadevi

The concept of NULL convention logic (NCL) is introduced for constructing low-power robust asynchronous circuits. The presence of registers in conventional NCL can account up to 35 % overall power consumption. This brief presents the Combination of single rail and dual rail encoding in Register-less Null Convention Logic (RL-NCL) design paradigm, which achieves low power consumption by eliminating pipeline registers, simplifying the control circuit, and supporting fine-grain power gating to mitigate the leakage power of sleeping logic blocks. And also here introducing the concepts of single rail encoding and dual rail encoding. Data paths are composed of a mixture of dual-rail and single-rail logic gates. Dual-rail logic gates are limited to construct a stable critical data path. Based on this critical data path, the handshake circuits are greatly simplified, which offers the pipeline high throughput as well as low power consumption.

NCL, RL-NCL, Kogga-Stone

"Low Power and Area efficient asynchronous NCL design based on optimized datapath ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.78-89, July-2018, Available :http://www.jetir.org/papers/JETIR1807909.pdf

"Low Power and Area efficient asynchronous NCL design based on optimized datapath ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp78-89, July-2018, Available at : http://www.jetir.org/papers/JETIR1807909.pdf