• Subodh Kumar Pandey
• Sanjeev Kumar Gupta

Now a days Chaos based systems plays an important role specifically in secure communication and cryptography. Chaotic systems have wide applications in random numbers generators, image encryption, Optical secure circuits, and quantum applications. This paper presents FPGA implementation of Autonomous Pandey-Baghel-Singh chaotic signal generators using Euler’s algorithm. Numerical algorithm is implemented using Verilog and tested with Xilinx vivado 17.3 design suite in Artix-7 Nexus 4 DDR and Basys 3. Performance of the FPGA based chaotic generators is analyzed using 106 data sets with the operating frequency up to 359.71 MHz.

Chaotic Generators, Euler algorithm, FPGA

"FPGA Implementation of an Autonomous Chaotic System using Euler Algorithm", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.265-268, July-2018, Available :http://www.jetir.org/papers/JETIR1807935.pdf

"FPGA Implementation of an Autonomous Chaotic System using Euler Algorithm", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp265-268, July-2018, Available at : http://www.jetir.org/papers/JETIR1807935.pdf