UGC Approved Journal no 63975

ISSN: 2349-5162 | ESTD Year : 2014
Call for Paper
Volume 8 | Issue 5 | May 2021

JETIREXPLORE- Search Thousands of research papers



WhatsApp Contact
Click Here

Published in:

Volume 5 Issue 7
July-2018
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

7.95 impact factor calculated by Google scholar

Unique Identifier

Published Paper ID:
JETIR1807964


Registration ID:
186058

Page Number

438-443

Share This Article


Jetir RMS

Title

AN EFFECTIVE FPU STREAMING PROCESSOR FOR FPGA ACCELERATORS

Abstract

In order to increase the speed and decrease the taxation on the hardware, other components are used in the system such as accelerators which can boost speed of the circuit. Hardware accelerators use computer hard ware for performing functions more efficiently than software running on a more general purpose CPU. To perform operations at high speed we have custom circuits where flexibility of circuit is static and soft-process approach where there is only register to register transfer is present whose performance is not much efficient. To improve the flexibility and to overcome the faults in existing system a high performance streaming processor, known as streaming accelerator element, is proposed which realizes accelerators as large scale custom multicore networks. By implementing this approach with advanced program control and memory addressing capabilities, we can see that the program inefficiencies can be almost eliminated to enable performance and cost, which are not possible among other software-programmable solutions. When used to realize accelerators for matrix multiplication it is shown how the proposed architecture enables real-time performance. For accommodating the floating point operations we add Floating Point Unit (FPU) to the ALU of processing elements which performs IEEE754 2008 single precision floating point operations addition, multiplication, and subtraction.

Key Words

Field Programmable Gate Array (FPGA), Accelerators, Floating Point, Matrix Multiplication, Streaming Elements

Cite This Article

"AN EFFECTIVE FPU STREAMING PROCESSOR FOR FPGA ACCELERATORS ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.438-443, July-2018, Available :http://www.jetir.org/papers/JETIR1807964.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"AN EFFECTIVE FPU STREAMING PROCESSOR FOR FPGA ACCELERATORS ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp438-443, July-2018, Available at : http://www.jetir.org/papers/JETIR1807964.pdf

Publication Details

Published Paper ID: JETIR1807964
Registration ID: 186058
Published In: Volume 5 | Issue 7 | Year July-2018
DOI (Digital Object Identifier):
Page No: 438-443
Country: HYDERABAD, TELANGANA, India .
Area: Engineering
ISSN Number: 2349-5162


Preview This Article


Downlaod

Click here for Article Preview

Download PDF

Downloads

0002453

Print This Page

Current Call For Paper

Jetir RMS