• Myakala Mounika
• Deepthi Amuru

In CMOS circuits more power is dissipated during charging and discharging the load capacitance. This can be lowered by minimizing the number of transitions inside CMOS circuit. This paper includes some encoding techniques to reduce the transition activity. An Adaptive Encoding technique is one among them. It aims to reduce transition activity in high capacitance off-chip data buses, since they are the main source of power dissipation. The entire architectures are programmed using Verilog. The coding is done on Xilinx ISE 14.7 and simulation is done using Xilinx ISim simulator and Modelsim.

Power dissipation, high capacitance, switching activity, number of transitions, off-chip data buses

"REDUCTION OF TRANSITIONS ON OFF-CHIP DATA BUSES USING ADAPTIVE BUS ENCODING", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 10, page no.1-9, October-2018, Available :http://www.jetir.org/papers/JETIR1810701.pdf

"REDUCTION OF TRANSITIONS ON OFF-CHIP DATA BUSES USING ADAPTIVE BUS ENCODING", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 10, page no. pp1-9, October-2018, Available at : http://www.jetir.org/papers/JETIR1810701.pdf