UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
Call for Paper
Volume 11 | Issue 3 | March 2024

JETIREXPLORE- Search Thousands of research papers



WhatsApp Contact
Click Here

Published in:

Volume 7 Issue 7
July-2020
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

7.95 impact factor calculated by Google scholar

Unique Identifier

Published Paper ID:
JETIR2007098


Registration ID:
235079

Page Number

795-799

Share This Article


Jetir RMS

Title

Implementation of Optimized Carry Look Ahead Adder Using Cadence

Abstract

In this paper, a discussion is done about 4-bit carry look ahead adder implementation with two different designs. The first design is Conventional carry look ahead adder (CLA) and second design is sketched using CLA equation it is called as carry chain structure. In first design of CLA, number of transistor count is more which increases power consumption and delay and in proposed design we reduce the transistor count. Schematic of two designs are implemented in cadence virtuoso tool in 180nm technology with 1.8V supply voltage and run the simulation. Two designs are compared based on their transistor count, power, and delay factors.

Key Words

Carry Look Ahead Adder (CLA), Carry Chain equation, low power, Cadence Virtuoso tool.

Cite This Article

"Implementation of Optimized Carry Look Ahead Adder Using Cadence", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 7, page no.795-799, July-2020, Available :http://www.jetir.org/papers/JETIR2007098.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Implementation of Optimized Carry Look Ahead Adder Using Cadence", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 7, page no. pp795-799, July-2020, Available at : http://www.jetir.org/papers/JETIR2007098.pdf

Publication Details

Published Paper ID: JETIR2007098
Registration ID: 235079
Published In: Volume 7 | Issue 7 | Year July-2020
DOI (Digital Object Identifier):
Page No: 795-799
Country: Ballari, karnataka, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


Preview This Article


Downlaod

Click here for Article Preview

Download PDF

Downloads

0003148

Print This Page

Current Call For Paper

Jetir RMS