UGC Approved Journal no 63975

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 8 Issue 7
July-2021
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2107350


Registration ID:
312451

Page Number

c618-c623

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Title

Area Efficient Three-Input XOR/XNOR Circuit

Abstract

As these circuits are fundamental building blocks of many arithmetic circuits, we present a novel three input XOR/XNOR circuit in this article to enhance performance and decrease space. To begin, choose a simple cell with three independent inputs and two complimentary outputs. Then, using different correction and optimization methods, we construct a flawless XOR-XNOR circuit with complete swing operation. We propose and build a 3-input XOR/XNOR gate using 8 transistors in this article, and compare it to current designs. In this article, we can build a suggested design utilizing a 180 nm CMOS technology process and Micro wind simulation findings. The employment of XOR–XNOR circuits in complete adder circuits, compressors, parity checks, and comparators has been the subject of many studies. The suggested designs outperform the current three-input XOR/XNOR circuits in terms of performance. In comparison to prior circuits, we utilized several kinds of optimization and correction methods to decrease the number of transistors.

Key Words

XOR/XNOR Circuits, Microwind, Digital schematic.

Cite This Article

"Area Efficient Three-Input XOR/XNOR Circuit", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.8, Issue 7, page no.c618-c623, July-2021, Available :http://www.jetir.org/papers/JETIR2107350.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Area Efficient Three-Input XOR/XNOR Circuit", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.8, Issue 7, page no. ppc618-c623, July-2021, Available at : http://www.jetir.org/papers/JETIR2107350.pdf

Publication Details

Published Paper ID: JETIR2107350
Registration ID: 312451
Published In: Volume 8 | Issue 7 | Year July-2021
DOI (Digital Object Identifier):
Page No: c618-c623
Country: Rajahmundry, Andhra Pradesh, India .
Area: Engineering
ISSN Number: 2349-5162


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