• Sagar
• Dr. Bharti Chourasia

Cryptography techniques are considered secure and efficient algorithms. Despite that like other symmetric encryption algorithms, the secret key distribution is still considered as a critical issue. Again to encrypt or decrypt a single block (128-bit) of data, an essential amount of computational processing has to be done which consumes more power. Internet of things (IoT) is the extension of the Internet to connect just about everything on the planet. This paper presents implementation of VLSI architecture of lightweight cipher cryptography technique for high speed FPGA Applications. A new one-dimensional substitution Box (S-box) is proposed instead of conventional 2-D S-box and previous 1-D S-box. Simulated result shows that proposed lightweight cryptography gives better performance than previous in term of delay, throughput, transmission time, efficiency rate.

IOT, Wireless, Security, Lightweight Cryptography, Encryption, Decryption, Block Cipher, Simulation, Synthesis, Xilinx

"VLSI Architecture of Lightweight Cipher Cryptography Technique for High Speed FPGA Applications", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 10, page no.b402-b406, October-2022, Available :http://www.jetir.org/papers/JETIR2210160.pdf

"VLSI Architecture of Lightweight Cipher Cryptography Technique for High Speed FPGA Applications", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 10, page no. ppb402-b406, October-2022, Available at : http://www.jetir.org/papers/JETIR2210160.pdf