• V.Tejaswi
• P.Pushpalatha

MAC unit is mostly used in Digital Signal Processing Applications. It performs the application of both addition and multiplication operation. In this project, the main aim is to Implementation of MAC unit using the parallel prefix adder like Brent Kung adder and Karatsuba multiplier and Parallel-in, Parallel-out Shift Register. This adder is the high speed adder to improve the speed of MAC unit and multiplication purpose. This adder is implemented to Karatsuba multiplier and to design the MAC unit. The performance and analysis of MAC unit is done by verilog code and the MAC unit is simulated and synthesized in Vivado HLS 2019.1 software. Here, by using optimized MAC using Karatsuba multiplier the power and delay is reduced when compared with optimized MAC using Wallace tree multiplier. The simulation results shows power, high speed and low area consumption MAC unit.

MAC unit, Karatsuba Multiplier, Brent Kung adder, Parallel-in, Parallel-out Shift Register.

"Analysis and Implementation of MAC using Karatsuba Multiplier for DSP", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 10, page no.d74-d80, October-2022, Available :http://www.jetir.org/papers/JETIR2210321.pdf

"Analysis and Implementation of MAC using Karatsuba Multiplier for DSP", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 10, page no. ppd74-d80, October-2022, Available at : http://www.jetir.org/papers/JETIR2210321.pdf