UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 12 | Issue 7 | July 2025

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Published in:

Volume 10 Issue 8
August-2023
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2308288


Registration ID:
523214

Page Number

c752-c755

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Title

Fpga implementation of digital modulation schemes using verilog hdl

Abstract

This paper describes the design and development of an FPGA-based digital Modulation Scheme for high-resolution Communication Application. We are focusing on implementation of Verilog based code simulation for fundamental and widely used digital modulation techniques such as Binary Amplitude-shift keying (BASK), Binary phase-shift keying (BPSK) In this work the idea of sinusoidal signals that have been generated is plain sailing in nature and based on fundamentals of signal sampling and quantization. Such concept of sinusoidal signals generation is not unfamiliar but somehow simplified using sampling and quantization in time and amplitude domain, respectively. The whole simulation is done on Modelsim and Xilinx-ISE using VERILOG Hardware descriptive language. The work has been accomplished on Thirty two bit serial data transmission with self-adjustable carrier frequency and bit duration length.

Key Words

Modulation,FPGA

Cite This Article

"Fpga implementation of digital modulation schemes using verilog hdl", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 8, page no.c752-c755, August-2023, Available :http://www.jetir.org/papers/JETIR2308288.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Fpga implementation of digital modulation schemes using verilog hdl", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 8, page no. ppc752-c755, August-2023, Available at : http://www.jetir.org/papers/JETIR2308288.pdf

Publication Details

Published Paper ID: JETIR2308288
Registration ID: 523214
Published In: Volume 10 | Issue 8 | Year August-2023
DOI (Digital Object Identifier):
Page No: c752-c755
Country: Bangalore, Karnataka, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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