UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 13 | Issue 3 | March 2026

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Published in:

Volume 11 Issue 1
January-2024
eISSN: 2349-5162

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Published Paper ID:
JETIR2401221


Registration ID:
531197

Page Number

c194-c202

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Title

A HIGH PERFORMANCE RTL IMPLEMENTATION OF QUANTUM LOGIC

Abstract

Applications like processors and others depend on mathematical calculations like square root. After the basic mathematical operations of addition, subtraction, multiplication, and division, square-root is the most useful and important in scientific calculations. The square root circuit is also used to boost the hardware's low power gain. Due to low power, there are additional benefits as well, including quick speed and small area. Area, latency, and power are often kept in balance. Low power consumption, circuit minimization, and speed enhancement are the newest technological trends. In this study, we use a modified XOR gate to modify the Samiur Rahman gate for the difference equation. A 4:1 multiplexer was used in the design of the improved XOR gate. We use Xilinx Vivado tool for synthesis and simulation respectively. On performing the proposed work on the tool, we found the performance parameter of the circuit is increased significantly.

Key Words

Square root, reversible logic, multiplexer, low power gain, XOR gate, Saimur Rahman Gate, Xilinx Vivado.

Cite This Article

"A HIGH PERFORMANCE RTL IMPLEMENTATION OF QUANTUM LOGIC", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.11, Issue 1, page no.c194-c202, January-2024, Available :http://www.jetir.org/papers/JETIR2401221.pdf

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2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"A HIGH PERFORMANCE RTL IMPLEMENTATION OF QUANTUM LOGIC", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.11, Issue 1, page no. ppc194-c202, January-2024, Available at : http://www.jetir.org/papers/JETIR2401221.pdf

Publication Details

Published Paper ID: JETIR2401221
Registration ID: 531197
Published In: Volume 11 | Issue 1 | Year January-2024
DOI (Digital Object Identifier):
Page No: c194-c202
Country: -, -, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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