ISSN: 2349-5162 | Impact Factor: 5.87

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Published in:

Volume 4 Issue 5
May-2017
eISSN: 2349-5162

Unique Identifier

JETIR1705039

Page Number

181-183

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Title

DESIGN AND IMPLEMENTATION OF KIDNEY STONE DETECTOR USING RDLSS ON FPGA

Abstract

Formation of kidney stone is life threatening and it is persisting worldwide. The people didn’t aware about the stone formation in its beginning stage. So, early detection of the disease is very important before damaging the organs gradually. The most popular Ultrasound scanning tool is used in diagnosis of kidney abnormalities. The identification of stone in the US based images is very much difficult due to the decreasing in contrast and presence of speckle noise. To eliminate the noise inside the US kidney images and to get better quality of the image connected to Pre-processing and segmentation is done by using RD-LSS (Reaction diffusion level set method) to detect precise stone location. The proposed system is implemented with Virtex-2 Pro (FPGA) by writing the code in Verilog HDL.

Key Words

RD-LSS, Ultrasound, Verilog HDL and FPGA

Cite This Article

"DESIGN AND IMPLEMENTATION OF KIDNEY STONE DETECTOR USING RDLSS ON FPGA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.4, Issue 5, page no.181-183, May-2017, Available :http://www.jetir.org/papers/JETIR1705039.pdf

Publication Details

Published Paper ID: JETIR1705039
Registration ID: 170340
Published In: Volume 4 | Issue 5 | Year May-2017
DOI (Digital Object Identifier):
Page No: 181-183
ISSN Number: 2349-5162

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