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Published in:

Volume 7 Issue 3
March-2020
eISSN: 2349-5162

Unique Identifier

JETIR2003247

Page Number

1717-1722

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Title

Design Of 32 Bit Asynchronous RISC-V Processor Using Verilog

ISSN

2349-5162

Cite This Article

"Design Of 32 Bit Asynchronous RISC-V Processor Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 3, page no.1717-1722, March-2020, Available :http://www.jetir.org/papers/JETIR2003247.pdf

Abstract

The main Aim of the Project is to design of 5 stage pipeline 32 bit asynchronous RISC-V CPU and its implementation. It performs operations,like division, subtraction, and addition.The ST control signal can be used as a centralized generator of activation signals is based on the micropipeline. The asynchronous processors have a number of benefits, mainly in System on chip it reduces the cross talk between the mixed circuits, ease of integrating multi-rate circuits, component reuse and low power consumption. Implementation of such kind of asynchronous RISC-V processor by using Verilog on Xilinx ISE Design Suite tool where it is the potential of handling R Type, I-Type and Jump instructions Along with it uses separate memory for both data and instruction.The performance parameters were obtained through simulation. The estimated power, and delay were low compared to synchronous CPU were observed by the simulation results of the design.

Key Words

RISC-V(Reduced Instruction Set), Harvard Architecture,ALU(Arithmetic and Logical Unit), Verilog, Xilinx , Asynchronous.

Cite This Article

"Design Of 32 Bit Asynchronous RISC-V Processor Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 3, page no. pp1717-1722, March-2020, Available at : http://www.jetir.org/papers/JETIR2003247.pdf

Publication Details

Published Paper ID: JETIR2003247
Registration ID: 230049
Published In: Volume 7 | Issue 3 | Year March-2020
DOI (Digital Object Identifier):
Page No: 1717-1722
ISSN Number: 2349-5162

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Cite This Article

"Design Of 32 Bit Asynchronous RISC-V Processor Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 3, page no. pp1717-1722, March-2020, Available at : http://www.jetir.org/papers/JETIR2003247.pdf




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