UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 10 Issue 9
September-2023
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2309378


Registration ID:
524815

Page Number

d723-d727

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Title

VLSI Implementation of Area and Delay Efficient Nano-AES for Internet-of-Things Application

Abstract

Cryptography techniques are considered secure and efficient algorithms. Despite that like other symmetric encryption algorithms, the secret key distribution is still considered as a critical issue. Again to encrypt or decrypt a single block (128-bit) of data, an essential amount of computational processing has to be done which consumes more power. Internet of things (IoT) is the extension of the Internet to connect just about everything on the planet. This paper presents implementation of data security algorithm based on Nano-AES or lightweight cryptography with 256 bit key for IOT application. A new one-dimensional substitution Box (S-box) is proposed instead of conventional 2-D S-box and previous 1-D S-box. Simulated result shows that proposed Nano-AES lightweight cryptography gives better performance than previous in term of delay, throughput, transmission time, efficiency rate.

Key Words

- IOT, Wireless, Security, Nano-AES lightweight Cryptography, Encryption, Decryption, Block Cipher, Simulation, Synthesis, Xilinx

Cite This Article

"VLSI Implementation of Area and Delay Efficient Nano-AES for Internet-of-Things Application ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 9, page no.d723-d727, September-2023, Available :http://www.jetir.org/papers/JETIR2309378.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"VLSI Implementation of Area and Delay Efficient Nano-AES for Internet-of-Things Application ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 9, page no. ppd723-d727, September-2023, Available at : http://www.jetir.org/papers/JETIR2309378.pdf

Publication Details

Published Paper ID: JETIR2309378
Registration ID: 524815
Published In: Volume 10 | Issue 9 | Year September-2023
DOI (Digital Object Identifier):
Page No: d723-d727
Country: Bhopal, MP, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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