• Gangavarapu Amarendra
• P. Anjaneyulu
• D.V.SuryaChandraBabu

This paper describes the designing of a 5GS/s 5-bit flash analog to digital converter with Low Power, High Speed (LPHS) efficient encoding scheme. The Conversion of thermometer code to binary code is one of the challenging task in the design of Flash ADC. The proposed encoder circuit translates thermometer code into intermediate gray code to reduce the effects of bubble errors. Pseudo dynamic CMOS logic style is used to achieve high speed in the proposed encoder. The proposed encoder is designed using 45nm technology at 0.9 V supply voltage using CADENCE tool. The simulation results were shown for a sampling frequency of 5GHz and average power dissipation of the encoder is 388µW.

Analog to digital converter, Flash ADC, Pseudo dynamic CMOS logic

"A Novel Design of LPHS Encoder for 5-bit Flash ADC", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.1, Issue 7, page no.789-794, December-2014, Available :http://www.jetir.org/papers/JETIR1407039.pdf

"A Novel Design of LPHS Encoder for 5-bit Flash ADC", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.1, Issue 7, page no. pp789-794, December-2014, Available at : http://www.jetir.org/papers/JETIR1407039.pdf