UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 2 Issue 3
March-2015
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR1503027


Registration ID:
150221

Page Number

545-548

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Title

Design and Implementation of Effective Architecture for Reversible Watermarking using FPGA

Abstract

The expansion of the Internet has frequently increased the availability of digital data such as images, audio and videos to the public & it is effortlessly duplicated & even manipulated. Digital watermarking is a technology being developed to ensure and facilitate data authentication, security and copyright protection of digital media. This paper focuses on the design and implementation of a fast FPGA (Field Programmable Gate Array) based architecture using discrete cosine transform (DCT) based image watermarking algorithm. The schematic based design and implementation of the VLSI architecture is done with Xilinx on Spartan 3E FPGA family. Security level offered by the watermarking techniques based on hardware is higher than the software based watermarking techniques. In hardware watermarking implementation, the data is untouched by an external party. The results show the viability of less Area, high speed & improve the clarity of the watermarked image.

Key Words

VLSI Architecture, Watermarking, FPGA, DCT

Cite This Article

"Design and Implementation of Effective Architecture for Reversible Watermarking using FPGA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.2, Issue 3, page no.545-548, March-2015, Available :http://www.jetir.org/papers/JETIR1503027.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Design and Implementation of Effective Architecture for Reversible Watermarking using FPGA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.2, Issue 3, page no. pp545-548, March-2015, Available at : http://www.jetir.org/papers/JETIR1503027.pdf

Publication Details

Published Paper ID: JETIR1503027
Registration ID: 150221
Published In: Volume 2 | Issue 3 | Year March-2015
DOI (Digital Object Identifier):
Page No: 545-548
Country: ahmedabad, gujarat, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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