UGC Approved Journal no 63975

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 3 Issue 6
June-2016
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR1606010


Registration ID:
160248

Page Number

45-49

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Title

Implementation of the AES Realization Method On Reconfigurable Hardware

Abstract

Abstract—This paper presents a VLSI implementation of the Advanced Encryption Standard (AES) algorithm. The AES is a Federal Information Processing Standard (FIPS), which is a cryptographic algorithm that is used to protect digital data. AES encryption and decryption requires a 128 bit wide input block and a 128 bit wide input key. Under the influence of a key schedule the input block is encrypted by transforming it in a unique way into a new block of same size. The major emphasis is on presenting a power and moreover an area optimized AES. For implementing AES Rijndael algorithm on FPGA we will choose VHDL as the design entry technique. Xilinx ISE Design Suite version 14.7 will be used for the Synthesis and Simulation of the code.

Key Words

AES, FIPS, Rijndael, FPGA, FSM, plaintext, ciphertext,VHDL,XILINX

Cite This Article

"Implementation of the AES Realization Method On Reconfigurable Hardware", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.3, Issue 6, page no.45-49, June-2016, Available :http://www.jetir.org/papers/JETIR1606010.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Implementation of the AES Realization Method On Reconfigurable Hardware", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.3, Issue 6, page no. pp45-49, June-2016, Available at : http://www.jetir.org/papers/JETIR1606010.pdf

Publication Details

Published Paper ID: JETIR1606010
Registration ID: 160248
Published In: Volume 3 | Issue 6 | Year June-2016
DOI (Digital Object Identifier):
Page No: 45-49
Country: Nagpur, Maharashtra, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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