• ADILAKSHMAMMA T
• Dr S.Venkatanarayanan

VLSI (Very Large Scale Integration) procedure has gigantic improvement in the course of the most recent ten years with highlights sizes being downscaled from micrometer to nanometer administration. This paper is more useful to analyze the design factors of the low power VLSI systems. The element sizes have moved from couple of small scale meters to couple of nanometers. Due to the increasing high complexity of modern VLSI chip design, Electronic Design Automation (EDA) tools play an important role in delivering high system performance. This work proposes the minimized interconnect power dissipation are also discussed in the detailed manner.

Low power, Optimization, VLSI Circuits, Power Consumption

"ANALYSIS OF LOW POWER IN THE EMBEDDED SYSTEM USING OPTIMIZATION TECHNIUES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 2, page no.860-863, February-2018, Available :http://www.jetir.org/papers/JETIR1802144.pdf

"ANALYSIS OF LOW POWER IN THE EMBEDDED SYSTEM USING OPTIMIZATION TECHNIUES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 2, page no. pp860-863, February-2018, Available at : http://www.jetir.org/papers/JETIR1802144.pdf