• Ashit Samdur
• Vaibhavdeep Sahare
• Nilesh Mohota
• Rahul Langde

We overview late improvements in the design of extensive limit content-addressable memory (CAM). A CAM is a memory that executes the query table capacity in a solitary clock cycle utilizing committed examination circuitry. CAMs are particularly mainstream in organize switches for parcel sending and bundle characterization, however they are additionally helpful in an assortment of different applications that require rapid table query. The primary CAM-design challenge is to diminish power utilization related with the expansive measure of parallel dynamic circuitry, without yielding velocity or memory thickness. In this paper, we review CAM-design strategies at the circuit level and at the structural level. At the circuit level, we review low-power coordinate line sensing systems and hunt line driving methodologies. At the engineering level we review three strategies for decreasing power utilization.

Content Addressable Memory(CAM), Matchline Pipelining, Matchline Sensing, NAND Cell, NOR Cell, Review, Searchline Power

"A Survey on Various Types of Content Address Memory", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 11, page no.218-222, November-2018, Available :http://www.jetir.org/papers/JETIR18IC044.pdf

"A Survey on Various Types of Content Address Memory", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 11, page no. pp218-222, November-2018, Available at : http://www.jetir.org/papers/JETIR18IC044.pdf