• M.Vimala
• Ajithkumar
• Hariharan
• Kannan

Universal Asynchronous Receiver Transmitter (UART) is the serial communication protocol that is used for data exchange between computer & peripherals. UART is a low velocity, short- distance, low-cost protocol. UART includes three modules which are received, the baud rate generator and transmitter. The UART design with Very High Description Language can be integrated into the Field Programmable Gate Array to achieve stable data transmission and to make system reliable and compact. In the result and simulation part, this project will focus on check the receive data with error free & baud rate generation at different frequencies. Before synthesizing of UART a baud rate generator is incorporated into the system. We use the frequency divider which sets itself to required frequency for the functionality at lower frequency. All modules are designed using VERILOG and implemented on Xilinx Suite development board. And Verilog methodology to be created testbench of UART and timing value of given verified operation of data correctly passed or not by mentor graphics tool

UART, mentor graphics tool, transmitter, receiver, baud rate, Verilog

"Verification of Universal Asynchronous Receiver Transmitter by Mentor Graphics Tool", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 4, page no.385-392, April-2019, Available :http://www.jetir.org/papers/JETIR1904M58.pdf

"Verification of Universal Asynchronous Receiver Transmitter by Mentor Graphics Tool", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 4, page no. pp385-392, April-2019, Available at : http://www.jetir.org/papers/JETIR1904M58.pdf