• VINAYAKAPALLAKKI V
• Pushpalatha K N

Edge detection is one of the basic operations carried out in image processing and objects identification. Edge detection is an important role in image processing which needs optimized, accurate and less latency architecture. Edge detection is a key role in this project with Adaptive threshold technique. The efficient canny edge detector plays an important role in real time application. In this Project the Gaussian filter is applied as preprocessing block to remove the high frequency edges. The Canny coefficients are approximated to suite the hardware requirements with less LUT’s and further the adaptive threshold technique is applied to obtain the finer details of edges. In this proposed method of edge computation using adaptive threshold method to reduce memory elements significantly, because it is takes less area takes less decision making time so it reduces delay and increased efficiency without effecting detection performance. The proposed edge detection architecture is implemented using Xilinx system generator tool on Spartan6 ATLYS (XC6SLX45) board. It is observed that the proposed method is better compared to existing architectures.

FPGA Implementation, Image Processing, Canny Edge Detection and System Generator.

"HIGH PERFORMANCE AND AREA EFFICIENT FPGA IMPLEMENTATIOIN OF DISTRIBUTED CANNY EDGE ALGORITHM", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.888-892, June-2019, Available :http://www.jetir.org/papers/JETIR1906421.pdf

"HIGH PERFORMANCE AND AREA EFFICIENT FPGA IMPLEMENTATIOIN OF DISTRIBUTED CANNY EDGE ALGORITHM", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp888-892, June-2019, Available at : http://www.jetir.org/papers/JETIR1906421.pdf