UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 6 Issue 6
June-2019
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR1906U44


Registration ID:
218768

Page Number

56-60

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Title

A Verilog Implementation of MAES Using Xilinx Software For Resource Constraint Environments

Abstract

Advance Encryption Standard (AES) is considered as one of the strongest and efficient algorithms. Despite that like other symmetric encryption algorithms, the secret key distribution is still considered as a critical issue. Again to encrypt or decrypt a single block (128-bit) of data, an essential amount of computational processing has to be done which consumes more power. Internet of things (IoT) is the extension of the Internet to connect just about everything on the planet. This paper presents verilog Implementation of Modified Advanced Encryption Standard Algorithm using Xilinx Software. MAES is a lightweight version of AES which meets the demand. A new one-dimensional substitution Box (S-box) is proposed instead of conventional 2-D S-box and previous 1-D S-box. Simulated result shows that proposed MAES gives better performance than previous MAES in term of delay, throughput, transmission time, efficiency rate.

Key Words

WiMax, IOT, Wireless, Security, Cryptography, Encryption, Decryption, Block Cipher, Simulation, Synthesis, Xilinx.

Cite This Article

"A Verilog Implementation of MAES Using Xilinx Software For Resource Constraint Environments", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.56-60, June 2019, Available :http://www.jetir.org/papers/JETIR1906U44.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"A Verilog Implementation of MAES Using Xilinx Software For Resource Constraint Environments", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp56-60, June 2019, Available at : http://www.jetir.org/papers/JETIR1906U44.pdf

Publication Details

Published Paper ID: JETIR1906U44
Registration ID: 218768
Published In: Volume 6 | Issue 6 | Year June-2019
DOI (Digital Object Identifier):
Page No: 56-60
Country: Bhopal, MP, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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