• N.M.Surekha
• S.Nanda Kishor

Reconfigurable systems often require secret keys to encrypt and decrypt data. Applications requiring high security commonly generate keys based on physical unclonable functions (PUFs), circuits that use random manufacturing variations to produce secret keys that are unique to each device. Implementing PUFs on field-programmable gate arrays (FPGAs) is usually difficult, because the designer has limited control over layout, and each PUF system requires a large area overhead to correct errors in the PUF response bits. The state of the art for FPGA-based weak PUFs is extended by using a novel methodology of per-device configuration and a new PUF variant derived from the popular FPGA-specific Anderson PUF. The design has several advantages over existing work including the Anderson PUF on which it is based. It is tunable to minimize the response bias and can be implemented using the common SLICEL components on Xilinx FPGAs along with an efficient per-device configuration that reduces bit error rate by over 10× at room temperature and improves response stability by over 2× across all temperatures. The Proposed PUF reduces the delay when compared to Existing PUFs. The designs are modeled in Verilog HDL and are simulated in Xilinx ISE 14.5 Tool. The functional Verification is Performed using Xilinx ISE Simulation Tool.

Cryptography, Error Detection and Correction, Extended Hamming Code, Field Programmable Gate Arrays, Physical Unclonable Functions

"EFFICIENT PUFs BASED ON EXTENDED HAMMING CODE", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.777-781, June 2019, Available :http://www.jetir.org/papers/JETIR1907866.pdf

"EFFICIENT PUFs BASED ON EXTENDED HAMMING CODE", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp777-781, June 2019, Available at : http://www.jetir.org/papers/JETIR1907866.pdf