• Narendra Kumar
• Ambresh Patel
• Braj Kishor

Montgomery modular multiplication, more commonly referred to as Montgomery multiplication, is a method for performing fast modular multiplication. This work shows a simple and efficient Montgomery multiplication algorithm such that the low-cost and high-performance Montgomery modular multiplier (MMM) can be implemented accordingly. This Paper proposed Verilog Implementation of Montgomery Modular Multiplication. It receives and outputs the data with binary representation and uses only one-level carry-save adder (CSA) to avoid the carry propagation at each addition operation. Simulation results show that the proposed Montgomery modular multiplier can achieve higher performance and significant area time product improvement when compared with existing MMM designs

Montgomery, Modular, Multiplication, MMM, VLSI, CSA, Cryptosystem

"Verilog Implementation of Montgomery Modular Multiplication", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.268-272, June 2019, Available :http://www.jetir.org/papers/JETIR1907A63.pdf

"Verilog Implementation of Montgomery Modular Multiplication", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp268-272, June 2019, Available at : http://www.jetir.org/papers/JETIR1907A63.pdf