• Chittiprolu. J S Manikanta Nitish
• Polepalli. Mani Sai Susmitha
• Vakapalli. Steven Viswash
• Chandu. Uday Kishore
• Ch. Srigiri

With the present omnipresence of pc networks, distributed systems generally, and also the net particularly, cryptography has become associate enabling technology to secure the data, infrastructures we tend to area unit building, using, and hoping on in way of life. In gift days, nearly each relevant communication system needs secure information transfer so as to keep up the privacy of the transmitted message. Hardware implementation on FPGA offers a faster and customizable answer. we tend to use Verilog Language for synthesizing logic style. This project uses Xilinx ISE 14.7i that is associate microcircuit development platform supported the Xilinx ISE 14.7i tool. Software package implementation on Xilinx is often advanced style and in counter mode it becomes the foremost complex drawback. we tend to customize the planning of AES formula to implement merely on Xilinx software package. This may later facilitate the developers to change and use the software package simply with none issues throughout installation of style. Some key blessings of AES encryption and coding formula are unit quick in execution and it additionally uses higher length sizes 128,192 and 256 bits for encryption which provides additional security to the information because it needs 2128 tries to deploy or hack the information.

"High Secured AES Encryption and Decryption Algorithm using Xilinx ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 6, page no.194-205, June-2020, Available :http://www.jetir.org/papers/JETIR2006033.pdf

"High Secured AES Encryption and Decryption Algorithm using Xilinx ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 6, page no. pp194-205, June-2020, Available at : http://www.jetir.org/papers/JETIR2006033.pdf