• Saurabh Shivam
• Jigyasa Kodnani
• Dr.Dhanamjayulu C

Multilevel Inverter comprises of various DC voltage levels added together to make a smoother output waveform, which provides a suitable solution for medium and high power systems to get an output voltage that permits a decrease of harmonic content in voltage and current waveforms. The harmonic content of the output voltage waveform decreases because the number of output voltage increases. Despite the fact that multilevel inverter has various benefits it has disadvantages in the vein of higher levels that causes increase in the number of semiconductor switches, which increases the size and cost of the inverter and furthermore leads to complex control. The new multilevel inverter with reduced number of switches helps to get rid of this issue and is appropriate for high power applications. This paper presents a 35-level multi-level inverter with H-bridge MLI topology with lesser number of switch requirements. This paper requires five dc voltage sources and eleven switches to synthesize 35 levels across the load in which two switches are complementary to operate for negative and positive input of DC source. The proposed idea increases the inverter efficiency by reducing THD, decreasing conduction and switching losses.

Multilevel inverter, H-bridge, asymmetrical, reduced switch count, Total harmonic distortion(THD)

"Design of 35-level Inverter with reduced switches count Η-bridge ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 6, page no.1234-1244, June 2020, Available :http://www.jetir.org/papers/JETIR2006514.pdf

"Design of 35-level Inverter with reduced switches count Η-bridge ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 6, page no. pp1234-1244, June 2020, Available at : http://www.jetir.org/papers/JETIR2006514.pdf