UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 8 Issue 10
October-2021
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2110308


Registration ID:
315630

Page Number

d65-d69

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Title

Matrix Representation of Graphs in Electronic Circuit

Authors

Abstract

The concept of logical connection between graph theory and analog circuit models of graph are presented in this paper. We formulate an analog electronic circuit network model based on truth table and its various components.

Key Words

Adjacent matrix, Incident matrix, Network Circuit, Electronic Circuit, Representation of Graph Models.

Cite This Article

"Matrix Representation of Graphs in Electronic Circuit", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.8, Issue 10, page no.d65-d69, October-2021, Available :http://www.jetir.org/papers/JETIR2110308.pdf

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2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Matrix Representation of Graphs in Electronic Circuit", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.8, Issue 10, page no. ppd65-d69, October-2021, Available at : http://www.jetir.org/papers/JETIR2110308.pdf

Publication Details

Published Paper ID: JETIR2110308
Registration ID: 315630
Published In: Volume 8 | Issue 10 | Year October-2021
DOI (Digital Object Identifier):
Page No: d65-d69
Country: Madurai, Tamil Nadu, India .
Area: Mathematics
ISSN Number: 2349-5162
Publisher: IJ Publication


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