• Koteswar Rao Bonagiri
• Giri Babu Kande
• P.Chandrasekhar Reddy

Estimation of Probability Density Functions (PDFs) in view of accessible information is critical issue emerging in various fields such as broadcast communications, machine learning, information mining, design pattern recognition and Personal Computer (PC) vision. In this paper, Low- Cost PDF (LC-PDF) method is introduced for “Histogram Estimation”. The Carry Select Adder (CSLA) employs in the Bin architecture for additional process. The Look-Up Table (LUT) using in priority encoder for storage purpose, which increases the system performance. The LC-PDF design is verified in Modelism by using Verilog code. The FPGA implementation is done by using Xilinx tool for two different type of devices such as Virtex-6 and Virtex-6 LP. The FPGA analysis, LUT, slices, and flip-flops. And the ASIC implementation is done by using 180nm and 45nm technology, which analysis area, power, delay, Area Power Product (APP), Area Delay Product (ADP) are improved in the LC-PDF method compared to conventional method.

Carry select adder, histogram equalization, look-up table, area power product, and area delay product.

"Low cost Probability Density Function Estimator Architecture for Image Histogram ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.8, Issue 12, page no.c471-c478, December-2021, Available :http://www.jetir.org/papers/JETIR2112262.pdf

"Low cost Probability Density Function Estimator Architecture for Image Histogram ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.8, Issue 12, page no. ppc471-c478, December-2021, Available at : http://www.jetir.org/papers/JETIR2112262.pdf