• Chandra Shekara Reddy P
• D. Indrasena Reddy

The aim of this paper is to determine the Addition. It is one of the most basic operations performed in all computing units, including microprocessors and digital signal processors. It is also a basic unit utilized in various complicated algorithms of multiplication and division. Efficient implementation of an adder circuit usually revolves around reducing the cost to propagate the carry between successive bit positions. Multi-operand adders are important arithmetic design blocks especially in the addition of partial products of hardware multipliers. The multi-operand adders (MOAs) are widely used in the modern low-power and high-speed portable very-large-scale integration systems for image and signal processing applications such as digital filters, transforms, convolution neural network architecture. Hence, a new high-speed and area efficient adder architecture is proposed using pre-compute bitwise addition followed by carry prefix computation logic to perform the three-operand binary addition that consumes substantially less area, low power and drastically reduces the adder delay. Further, this project is enhanced by using Modified carry bypass adder to further reduce more density and latency constraints. Modified carry skip adder introduces simple and low complex carry skip logic to reduce parameters constraints. In this proposal work, designed binary tree adder (BTA) is analyzed to find the possibilities for area minimization. Based on the analysis, critical path of carry is taken into the new logic implementation and the corresponding design of CSKP are proposed for the BTA.

Multi-operand adders (MOAs), Binary Tree Adder (BTA), Carry Skip Adder (CSKP).

"HIGH-SPEED AREA-EFFICIENT VLSI ARCHITECTURE USING CARRY SKIP ADDER", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 1, page no.c422-c431, January-2022, Available :http://www.jetir.org/papers/JETIR2201259.pdf

"HIGH-SPEED AREA-EFFICIENT VLSI ARCHITECTURE USING CARRY SKIP ADDER", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 1, page no. ppc422-c431, January-2022, Available at : http://www.jetir.org/papers/JETIR2201259.pdf