• Preeti Sahu
• Payal Basal

In a simple word counters can be defined as a digital sequential circuit which used to counting clock pulses. It has a widest application in the flip-flop circuit. In the digital world counters also known as a device which used to store the number of time for processing a particular event with using clock signal. This paper enumerated with designing of 4-bit Up-down counter with different low power technologies. The circuit has been implemented on FPGA using Xilinx-14.7. Power Optimization has been done through DSCH-Microwind-3.5 software tool. All the parameters has compared with implementing the circuit using different techniques.

Low Power concept, Counter circuit, Up-Down Counter, Clock Gating, Power Gating, Gate-Diffusion Input, Implementation of Up-Down Counter circuit, Parameters optimization in Counter circuit.

"4-BIT COUNTER DESIGN USING DIFFERENT LOW POWER DESIGN STYLES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 2, page no.e21-e28, February-2022, Available :http://www.jetir.org/papers/JETIR2202403.pdf

"4-BIT COUNTER DESIGN USING DIFFERENT LOW POWER DESIGN STYLES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 2, page no. ppe21-e28, February-2022, Available at : http://www.jetir.org/papers/JETIR2202403.pdf