• Aamir Akbari
• Prof. Mohd Abdullah

Approximate calculation has received significant attention as a promising strategy to enhance performance of multiplication. Various arithmetic operations such as multiplication addition, subtraction are important part of digital circuit to speed up the computation speed of processor. This paper presents design and analysis of 64 x 64-bit approximate-multiplier for FPGA-DSP in artificial intelligence applications. Previous it is designed for 16 bit and 32 bit for various applications. Research work is focus on hardware-level approximation by introducing the partial product perforation technique and dadda multiplier for designing approximate multiplication circuits. Xilinx 14.7 is used to implementation with verilog programming language.

"Design and Analysis of 64 X 64-bit Approximate-Multiplier for FPGA-DSP in Artificial Intelligence Applications", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 5, page no.c863-c867, May-2022, Available :http://www.jetir.org/papers/JETIR2205413.pdf

"Design and Analysis of 64 X 64-bit Approximate-Multiplier for FPGA-DSP in Artificial Intelligence Applications", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 5, page no. ppc863-c867, May-2022, Available at : http://www.jetir.org/papers/JETIR2205413.pdf