• Monika Singh
• Prashant Chaturvedi

Multiplier is an essential block of a computing device. Multipliers are commonly used for signal and image processing applications where multipliers are used to perform various tasks like convolution, correlation and filtering. Multipliers are not only a high delay component but also dissipate high amount of power. It is necessary to increase the speed of multipliers as the demand of high speed processors is increasing. Moreover, multipliers are an integral part of any processor and are utilized by the processors to complete signal processing tasks. This paper presents the new compressors for partial product reduction. Compressors are used to reduce partial products. Compressors take more inputs at a time and are able to process partial products in a faster way compared to conventional adders. Use of compressors in the partial product reduction helps to minimize the delay but not area consumption. Our proposed compressors aim to reduce the delay and power consumption together. Single and multicolumn compressors are proposed and used in the partial product reduction. Experimental results showed that our proposed approaches are performing better than existing approaches.

Urdhwa Multiplier, 4:3 Compressor, 7:4 compressor and Xilinx Vertex family

"Design Power Efficient and High Speed Multipliers using of Approximate Compressors ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 6, page no.e644-e649, June-2022, Available :http://www.jetir.org/papers/JETIR2206475.pdf

"Design Power Efficient and High Speed Multipliers using of Approximate Compressors ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 6, page no. ppe644-e649, June-2022, Available at : http://www.jetir.org/papers/JETIR2206475.pdf