UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 13 | Issue 3 | March 2026

JETIREXPLORE- Search Thousands of research papers



WhatsApp Contact
Click Here

Published in:

Volume 9 Issue 8
August-2022
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

7.95 impact factor calculated by Google scholar

Unique Identifier

Published Paper ID:
JETIR2208165


Registration ID:
500974

Page Number

b541-b551

Share This Article


Jetir RMS

Title

Design and Analysis of Basic Adder with 8-bit Parallel Prefix Adder

Abstract

Adders are the important and essential block of the digital circuit. It performs the addition in a digital circuit and so the overall performance of the digital circuit depends on the selection of a suitable adder. The proper selection of adder is needed to reduce the extra laborious work and complexity of a digital system. In this paper, we are comparing the different adders that have been synthesized using the Xilinx synthesis tool and simulated using the Verilog hardware description language and Xilinx simulation tool. The output of the simulation data helps in observing the different properties of adder. These properties get on the difference in operation and execution of the adders. Prefix Adder (PA), Kogge Stone Adder (KSA), Carry Select Adder (CSLA), Carry Skip Adder (CSKA), Carry Look Ahead Adder (CLA) and Ripple Carry Adder (RCA) have been compared with help of three basic aspects namely, device utilization i.e., number of slices, delay and power.

Key Words

Parallel prefix adder

Cite This Article

"Design and Analysis of Basic Adder with 8-bit Parallel Prefix Adder", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 8, page no.b541-b551, August-2022, Available :http://www.jetir.org/papers/JETIR2208165.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Design and Analysis of Basic Adder with 8-bit Parallel Prefix Adder", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 8, page no. ppb541-b551, August-2022, Available at : http://www.jetir.org/papers/JETIR2208165.pdf

Publication Details

Published Paper ID: JETIR2208165
Registration ID: 500974
Published In: Volume 9 | Issue 8 | Year August-2022
DOI (Digital Object Identifier):
Page No: b541-b551
Country: Visakhapatam, Andhra Pradesh, India .
Area: Science & Technology
ISSN Number: 2349-5162
Publisher: IJ Publication


Preview This Article


Downlaod

Click here for Article Preview

Download PDF

Downloads

000408

Print This Page

Current Call For Paper

Jetir RMS