• P.PAVANI
• Dr.B.Nageshwar Rao
• Dr.T.Vamsi

Finite-field multiplication has gotten a lot of attention recently because of its potential use in encryption and error-detection codes. Complex, expensive, and time-consuming, it may take millions of gates to perform this arithmetic function in many cryptographic algorithms. With the Luov cryptography algorithm as a case study, we offer efficient equipment important in the design upon cyclic redundancy checks (CRC) error-detection algorithms. Luov made it to the next stage of both the National Institute of Standards & Technology's (NIST) PQC challenge. CRC polynomials have been chosen based on their ability to detect errors as well as their field widths. Software implementations of proposed systems are tested to verify the formulations' derivations using our verification codes. It is further shown that, in hardware implementations of a Xilinx ground gated arrays (FPGA), the suggested error detection algorithms produce high error coverage with acceptable overhead for the original multipliers.

Cyclic redundancy check (CRC), fault detection, field-programmable gate array (FPGA), finite-field multiplication.

"AN EFFECTIVE INVESTIGATION ON RELIABLE CRC-BASED ERROR DETECTION CONSTRUCTIONS FOR FINITE FIELD MULTIPLIERS WITH APPLICATIONS IN CRYPTOGRAPHY", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 8, page no.f251-f258, August-2022, Available :http://www.jetir.org/papers/JETIR2208524.pdf

"AN EFFECTIVE INVESTIGATION ON RELIABLE CRC-BASED ERROR DETECTION CONSTRUCTIONS FOR FINITE FIELD MULTIPLIERS WITH APPLICATIONS IN CRYPTOGRAPHY", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 8, page no. ppf251-f258, August-2022, Available at : http://www.jetir.org/papers/JETIR2208524.pdf