• CH.V.D ASHOK KUMAR
• Y.Sri Chakrapani

Content addressable memories are implemented in FPGAs for the applications in the 5G networks to improve their performance. CAM’s are searching devices which can search the input according to their address locations in one clock cycle. TCAM are implemented in the routing table in the networks to transmit the data in packets where don’t care bits are chosen for the multiple address locations. In this paper FPGA based TCAM are implemented along with the use of other peripherals which are already available in the FPGAs. Compared with the previous TCAM architectures the proposed reconfigurable TCAM achieves better results in terms of power conserving. Hence the proposed TCAM’s is implemented in FPGA’s to improve the performance.

5G Networks, Field-programmable gate arrays (FPGAs), FPGA-deployed TCAM, power conserving, Routing Table

"Implementation and Analysis of 32-Bit TCAM (Ternary Content Addressable Memory) using FPGA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 9, page no.e659-e663, September-2022, Available :http://www.jetir.org/papers/JETIR2209477.pdf

"Implementation and Analysis of 32-Bit TCAM (Ternary Content Addressable Memory) using FPGA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 9, page no. ppe659-e663, September-2022, Available at : http://www.jetir.org/papers/JETIR2209477.pdf