• Ms.Kampamalli Apsara
• Ms.S.Shamar sulthana
• Mr.N.Nagendra
• Mrs.B.Hima Bindhu

The Multiplier-Accumulator (MAC) module may be built with the help of the Vedic multiplier and reversible logic gates. Specifically, the Vedic multiplier is constructed with the help of the recently discovered sutra Urdhava Triyagbhayam. How well a MAC works depends on the multiplier and adder units. An efficient multiplier and adder may be built with the use of reversible gates. Improved performance, smaller size, and fewer partial products can all be achieved by employing a Vedic multiplier. Due to its faster operation and reduced energy use, reversible computing is now trending up in the computer world. With an RCA-based DKG adder and a CSLA-based DKG adder, we showed off an 8, 16, 32, and 64-bit Vedic multiplier. Included in this group is the recently suggested DKG gate adder. CSLA claims that its operation is lightning quick. Carry select adder (CSA) vs. ripple carry adder (RCA) (CSA). Finally, the speed of operation of the proposed CSLA-based DKG gate with a Vedic multiplier-fast adder has been shown. The FPGA vertex7 board receives the results of the simulation and synthesis managed by Xilinx ISE14.7.

MAC unit ,vedic Urdhava Triyagbhayam algorithm,DKG reversible gate and CSLA structure.

"High Speed Vlsi Architecture Of Mac Vedic Multiplier Using Reversible Logic", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.9, Issue 11, page no.c556-c562, November-2022, Available :http://www.jetir.org/papers/JETIR2211262.pdf

"High Speed Vlsi Architecture Of Mac Vedic Multiplier Using Reversible Logic", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.9, Issue 11, page no. ppc556-c562, November-2022, Available at : http://www.jetir.org/papers/JETIR2211262.pdf