UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 13 | Issue 3 | March 2026

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Published in:

Volume 10 Issue 4
April-2023
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2304702


Registration ID:
512839

Page Number

h8-h14

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Title

High performance IIR Implementation Using Verilog

Abstract

This study provides a reconfigurable infinite impulse response (IIR) filter with an enhanced design that is applicable to many real-time applications. The parallel-pipeline-based finite impulse response (FIR) filter implements the proposed IIR design. Excellent qualities of the FIR filters include great stability, linear phase response, and reduced errors of finite precision. Hence in terms of signal processing, FIR-based IIR architecture is more appealing and selective. Also addressed are the other two complementary approaches, look-ahead and two-level pipeline IIR filter designs. The results of the implementation demonstrate that the suggested FIR-based IIR design produces better outcomes in high performance IIR filter using Verilog. Infinite Impulse Response (IIR) filter is a digital filter. Time delay gives the information of speed. IIR filter which has minimum time delay gives better response than others. Area utilization and time delay are two important factors to design any filter. The important advantage of IIR filter on FIR filter is its implementation efficiency. IIR filters require less number of orders as comparison to meet same specification.

Key Words

iir filter,fir filter,delay,power,area

Cite This Article

"High performance IIR Implementation Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 4, page no.h8-h14, April-2023, Available :http://www.jetir.org/papers/JETIR2304702.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"High performance IIR Implementation Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 4, page no. pph8-h14, April-2023, Available at : http://www.jetir.org/papers/JETIR2304702.pdf

Publication Details

Published Paper ID: JETIR2304702
Registration ID: 512839
Published In: Volume 10 | Issue 4 | Year April-2023
DOI (Digital Object Identifier):
Page No: h8-h14
Country: Nellore, Andhrapradesh, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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