UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 10 Issue 5
May-2023
eISSN: 2349-5162

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Published Paper ID:
JETIR2305G04


Registration ID:
518000

Page Number

p23-p29

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Title

Different PWM control analysis for reduced switch count and cascaded H bridge multi level inverter topology

Authors

Abstract

Power conversion with high performance, low switching loss, and low THD values related to voltage and current necessitate the design of a multilevel inverter. In a multi-level inverter, the optimal output value is determined by the harmonic quantities to raise the output levels. The harmonic performance of the nine-level cascaded H bridge (CHB) converter is remarked in this paper and results are monitored for various Pulse width modulation techniques and different loads like resistor, inductor values. The same amount of voltage level is developed using reduced switch count multilevel inverter (RSC-MLI) named cascaded T type topology, this circuit control algorithm uses a smaller number of carrier signals compared with CHB-MLI. To validate the operation of the nine level CHB and RSC-inverter module topologies, MATLAB simulation results are presented.

Key Words

Multilevel inverter, PWM, Switching loss, THD.

Cite This Article

"Different PWM control analysis for reduced switch count and cascaded H bridge multi level inverter topology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 5, page no.p23-p29, May-2023, Available :http://www.jetir.org/papers/JETIR2305G04.pdf

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2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Different PWM control analysis for reduced switch count and cascaded H bridge multi level inverter topology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 5, page no. ppp23-p29, May-2023, Available at : http://www.jetir.org/papers/JETIR2305G04.pdf

Publication Details

Published Paper ID: JETIR2305G04
Registration ID: 518000
Published In: Volume 10 | Issue 5 | Year May-2023
DOI (Digital Object Identifier):
Page No: p23-p29
Country: warangal, Telangana, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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