• K. Saritha Raj
• Dr. M. Satyanarayana
• Dr. P. Rajesh Kumar

Reversible Gates (RGs) have always been an attraction for most digital circuit designers for their numerous advantages in providing high speed, low power dissipation and reduced chip area. Most recent applications include designing larger circuits like 16/32-bit adders, multipliers, ALUs, registers, decoders etc. RGs provide a wide range of flexibility in designing new types of reversible logic circuits. The common reversible gates can be modified easily to be accommodated into the required circuit design. The design presented in this paper is a new reversible full adder circuit which uses Multiple Control Toffoli (MCT) and Multiple Control Fredkin (MCF) reversible gates. This proposed circuit is compared with the existing designs of full adder circuits in terms of various performance parameters like the Gate Count, Transistor Count, Ancilla Input, Garbage Output, Quantum Cost and Power dissipation. When compared with the existing designs, this new reversible full adder proves to have the least power dissipation with a slight compromise on Quantum cost. Hence this circuit is the best option to be used in the implementation of larger circuits like multipliers.

Multiple Control Toffoli gate, Multiple Control Fredkin gate, Ancilla Input, Garbage Output, Quantum Cost.

"Design of a New Reversible Full Adder using MCT and MCF Reversible Gates.", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 6, page no.j20-j24, June-2023, Available :http://www.jetir.org/papers/JETIR2306904.pdf

"Design of a New Reversible Full Adder using MCT and MCF Reversible Gates.", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 6, page no. ppj20-j24, June-2023, Available at : http://www.jetir.org/papers/JETIR2306904.pdf