• Vignesh Ramesh Rao
• Vinay R N
• Shubham
• Akshay Bhargav H D
• Kiran A Gupta

This study explores the design and simulation of a 4-quadrant analog multiplier using 90nm CMOS technology. Analog multipliers play a vital role in signal processing tasks such as modulation, frequency conversion, and adaptive filtering. By supporting both positive and negative input signals, the 4-quadrant multiplier is well-suited for operations across the entire input spectrum. The design employs the translinear principle to ensure consistent linearity over an extended input range while minimizing power usage and distortion. Using a standard 90nm CMOS process, the circuit was developed and simulated with emphasis on optimizing core performance factors such as power efficiency, linearity, and bandwidth. Simulation results confirm the design's accuracy and energy efficiency, making it an excellent candidate for integration into modern analog signal processing systems.

Analog multipliers, 4-quadrant multiplier, CMOS technology, signal processing, modulation, phase detection, power measurement, operational amplifiers, linearity, feedback techniques

"Design and simulation of 4 Quadrant Analog Multiplier using 90nm Technology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.11, Issue 12, page no.h617-h623, December-2024, Available :http://www.jetir.org/papers/JETIR2412773.pdf

"Design and simulation of 4 Quadrant Analog Multiplier using 90nm Technology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.11, Issue 12, page no. pph617-h623, December-2024, Available at : http://www.jetir.org/papers/JETIR2412773.pdf