UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 12 | Issue 10 | October 2025

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Volume 12 Issue 1
January-2025
eISSN: 2349-5162

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Published Paper ID:
JETIR2501591


Registration ID:
554471

Page Number

e762-e769

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Title

A Review of Karnaugh Maps: Applications and Techniques for Logic Design

Abstract

The Karnaugh Map (K-Map) is a graphical technique widely employed in digital electronics and computer science to simplify Boolean algebra expressions and optimize logic circuit design. Developed by Maurice Karnaugh in 1953, this method extends the truth table approach by organizing logical values into a two-dimensional grid, leveraging the concept of adjacency to visually identify common factors. K-Maps are particularly effective for Boolean functions with up to six variables, with optimal utility in scenarios involving four or fewer variables. By reducing complex logical expressions into their simplest forms, K-Maps minimize the number of logic gates required, enhancing efficiency in circuit implementations. This review article delves into the foundational principles of Karnaugh Maps, detailing their construction, rules, and grouping techniques for simplification. Practical examples illustrate their application, including advanced topics such as handling don’t-care conditions and multi-variable cases. Furthermore, the article explores recent innovations that expand the applicability of K-Maps in modern digital technology. By offering a comprehensive overview, this article underscores the critical role of Karnaugh Maps in achieving effective circuit design and optimization in the evolving landscape of digital systems.

Key Words

Introduction, Exploring Karnaugh maps, Emerging trends, Future directions, Open problems, Applications

Cite This Article

"A Review of Karnaugh Maps: Applications and Techniques for Logic Design", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 1, page no.e762-e769, January-2025, Available :http://www.jetir.org/papers/JETIR2501591.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"A Review of Karnaugh Maps: Applications and Techniques for Logic Design", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 1, page no. ppe762-e769, January-2025, Available at : http://www.jetir.org/papers/JETIR2501591.pdf

Publication Details

Published Paper ID: JETIR2501591
Registration ID: 554471
Published In: Volume 12 | Issue 1 | Year January-2025
DOI (Digital Object Identifier): http://doi.one/10.1729/Journal.43382
Page No: e762-e769
Country: Mysuru, Karnataka, India .
Area: Mathematics
ISSN Number: 2349-5162
Publisher: IJ Publication


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