• S.Subramanyam
• J.Rahul
• K.Harish
• A.Ajay Kumar
• S.Mani sai

Digital Signal Processing (DSP) methods have become much more significant in recent years. Two key DSP techniques are the Fast Fourier Transform (FFT) and the Discrete Fourier Transform (DFT). DFT is often utilized in applications like linear filtering and convolution. The Fast Fourier Transform (FFT) is an additional approach for effectively computing DFT. In the realm of communication systems, including digital video and audio broadcasting, fast Fourier transform processors are crucial. The radix-2 DIT FFT algorithm is used in this research to design an 8 point FFT. Xilinx ISE software uses Verilog HDL to build this 8 point FFT architecture. Rapid developments in signal processing applications have increased the demand for high-performance, effective designs to carry out intricate algorithms such as the Quick Fourier Transform (FFT). In order to solve issues with real-time processing, power consumption, and resource utilization, this study presents a VLSI implementation of a pipelined FFT architecture tailored for DSP applications. Our solution uses pipelining techniques and the FFT algorithm's parallelism to provide low latency and great throughput with little power consumption and area overhead. This architecture can be incorporated into system-on-chip (SoC) designs or dedicated DSP processors using VLSI approaches. Because of its area efficiency optimization, it can operate well in applications with limited resources.

Digital Signal Processing (DSP), Discrete Fourier Transform (DFT), Fast Fourier Transform (FFT), Split-Radix FFT (SRFFT), Decimation in Time FFT (DIT-FFT), Decimation in Frequency FFT (DIF-FFT)

"Design and Implementation of Pipelined FFT Architecture For DSP Application Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 5, page no.f542-f549, May-2025, Available :http://www.jetir.org/papers/JETIR2505661.pdf

"Design and Implementation of Pipelined FFT Architecture For DSP Application Using Verilog", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 5, page no. ppf542-f549, May-2025, Available at : http://www.jetir.org/papers/JETIR2505661.pdf