• Dr. VINAYKUMAR H S
• SOWJANYA S R
• SANJANA R
• POORVI H L
• NISARGA P

The APB (Advanced peripheral bus) protocol is a part of AMBA(advanced microcontroller bus architecture) family. Design under test (DUT) is tested and it establishes the communication between master(test bench) and slave (design). It is designed based on a reusable based methodology for system on chip (SOC) which is essential in order to meet the current VLSI challenges. APB involves low bandwidth, low cost and minimal power consumption and is used to connect the Timer, Keypad and other devices to the bus architecture. The work involved is of APB protocol design and implementation. Here we are designing six test cases namely single and multiple write transaction with and without wait, multiple write transaction with and without wait states, multiple read and write transaction with and without wait. The design is programmed using Verilog HDL and tested using SystemVerilog test bench. And finally the APB design is verified using QuestaSim tool.

AMBA Protocol, APB Protocol, Scoreboard-based Verifiacation, SystemVerilog Testbench, RTL Design, Finite State Machine (FSM), Simulation using QuestaSim, Verilog HDL, Wait State Handling

"DESIGN AND VERIFICATION OF AMBA APB USING SYSTEM VERILOG", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 7, page no.a301-a307, July-2025, Available :http://www.jetir.org/papers/JETIR2507031.pdf

"DESIGN AND VERIFICATION OF AMBA APB USING SYSTEM VERILOG", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 7, page no. ppa301-a307, July-2025, Available at : http://www.jetir.org/papers/JETIR2507031.pdf