UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 12 | Issue 10 | October 2025

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Published in:

Volume 12 Issue 7
July-2025
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2507450


Registration ID:
566186

Page Number

e340-e348

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Title

Cryptographically Enhanced FSM-Driven Safe Lock System with IoT Integration on FPGA Platform

Abstract

This paper presents a pioneering Finite State Machine (FSM)-based Safe Lock System implemented on the EDGE Artix-7 FPGA (XC7A35TFTG256-1) using Verilog HDL, integrating advanced cryptographic techniques and IoT connectivity for next-generation security. The system employs a lightweight Advanced Encryption Standard (AES-128) core for secure password storage, ensuring resilience against brute-force attacks. A modular FSM governs password authentication, retry limitation (three attempts), and dynamic password updates, with debouncing for glitch-free push-button inputs. Novel features include a machine learning (ML)-based anomaly detection module, leveraging a lightweight neural network to identify irregular password entry patterns, and an IoT interface for remote monitoring and control via a secure MQTT protocol. Real-time feedback is provided through LEDs, with outputs indicating access granted or denied. The design’s hierarchical RTL architecture optimizes resource utilization (<5\% LUTs at 100 MHz) and supports scalability for multi-factor authentication, such as biometric integration. Behavioral simulations and hardware prototyping validate the system’s robustness, achieving sub-microsecond response times and fault tolerance superior to microcontroller-based alternatives. Comparative analysis highlights enhanced security over traditional locks and reduced complexity compared to biometric systems. This work advances embedded security by merging cryptographic, ML, and IoT paradigms on a reconfigurable FPGA platform, making it ideal for high-security applications like banking and smart homes. Future enhancements include post-quantum cryptography and energy-efficient ML inference, positioning the system as a benchmark for secure, intelligent access control.

Key Words

FPGA, Verilog HDL, Finite State Machine (FSM), AES-128, IoT, MQTT, Machine Learning, Anomaly Detection, EDGE Artix-7, Debouncing.

Cite This Article

"Cryptographically Enhanced FSM-Driven Safe Lock System with IoT Integration on FPGA Platform", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 7, page no.e340-e348, July-2025, Available :http://www.jetir.org/papers/JETIR2507450.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Cryptographically Enhanced FSM-Driven Safe Lock System with IoT Integration on FPGA Platform", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 7, page no. ppe340-e348, July-2025, Available at : http://www.jetir.org/papers/JETIR2507450.pdf

Publication Details

Published Paper ID: JETIR2507450
Registration ID: 566186
Published In: Volume 12 | Issue 7 | Year July-2025
DOI (Digital Object Identifier):
Page No: e340-e348
Country: Vijayawada, Andhra Pradesh, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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